Digital Logic Systems - SSI, MSI, LSI, and VLSI (Basics)

 

DIGITAL Series - SSI / MSI / LSI / VLSI (Basics)

Combinational Logic and SSI/MSI:

• Small Scale Integration and Medium Scale Integration - Glue of circuits.
• 3 variable Minterm possibilities (x, y, z):

            

• Notation - In the above table, the values are getting multiplied. 
• The opposite of minterm is maxterm:
  
• Minterm - Sum of Minterms. Example: F(x, y, z) = SUMMATION m(6,7) 
• Maxterm - Product of Sum. Example: F(x, y, z) = (x + y + z) * (/x + y + /z)

• *** Very Important Note - Karnaugh Maps (or K maps) are used for logical optimization but not included in this article.

SSI / MSI Blocks:

• The present-day large scale integration few years ago, in today's time a small scale integration as shown on the following rough data.
• SSI → 10 to 100
• MSI →100 to 1000
• LSI → 1000 to 10,000
• VLSI →10,000+
• Transistor Count as per Moore's Law curve - Source: Wikipedia
• The highest transistor count as per current day (or year 2023) is 3-D stacked 5.3 trillion transistors. 

• Decoders: Devices that 'decode' one set of inputs and map them into another.
• Decoder Example:- 2 to 4 decoder (shown below)

• In the above table, the logic of the circuit is - there are 4 outputs(Y):

Y0(S0, S1) = /S1 * /S0

Y1(S0, S1) = /S1 * S0

Y2(S0, S1) = S1 * /S0

Y3(S0, S1) = S1 * S0

Fig - 2:4 Decoder

• The more commonly used decoder is 3:8 decoder, and the chip is called 74**138 (reference pdf). Below is an example datasheet pinout diagram for a 3:8 decoder chip:

• A0, A1, A2 - Inputs; Y0 to Y7 are active high; /Y0 to /Y7 are active low (active low is more common which has inverted output). Active low is more commonly used because many chips use active low to select for enabling. When it was first design during initial days, it was set to active low meaning chip will turn on! - which is used a lot for memory addressing. Each one of the Y outputs is used for enabling the memory, with output set to low to enable it.

• /E1, /E2, E3, are enables (not necessarily needed multiple enables). Three enables are designed in order to validated different signals and validate the IC's functionality, such as select an active high and an active low.

• Remarks: Table for HC138 - When enable is not enabling, regardless of the address (A), the outputs are automatically set to High.

• Example Datasheets > original DIP package version 1972: click here; > CMOS device version click here, 3.3volt fastest version CMOS click here

• In the datasheet term - 'switching characteristics' means AC or DC characteristics.

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