> To design the transistor dc schematic, we are using GPDK 180 nm library:
- Select 'nmosrf' from the palette, and select width to 5u (micron) Finger as shown below:
- Add technology netlist as it is necessary to simulate your circuit:
- Add DC simulation to ensure (shown below):
- Go to sources - freq. domain on left panel, and add DC voltage:
- Connect voltage source (-) to ground, and voltage source (+) to gate of nMOS. Name the gate input as 'G' as shown below:
- Ground the Source and Body as below. Connect the Drain with current probe, and ground the other end of ID - drain current probe.
 |
Edit Simulation Settings. |
 |
Simulation Settings - Standard_ic. |
 |
Naming Drain as D. |
 |
Naming current probe as ID. |
- Renaming drain-source voltage to VDS, and gate voltage to VB. Also, add variable as shown below:
- Add parameter sweep to add sweep and simulation variables for the rectangular simulation plot (shown below):
- Adding VDS to the plot (click and name x-axis as VDS which is already mentioned in parameter sweep above):
 |
Adding more precise digits. |
 |
Final Simulation with line marker to observe voltage and current values. |
Comments
Post a Comment