RFIC Design: AC/DC Transistor Simulations using ADS (Keysight)

Posted by SemiSaga on

 > In this post, we will discuss the details on how to simulate the AC circuits on ADS Keysight.



AC Circuit Design:

  • Connect a Resistor - R, and a Capacitor - C as shown below with AC simulation component. The start, stop, and step are described in the below image:


  • To simulate the magnitude, you may use a rectangular plot as shown below:


  • To add more rectangular plots such as dB, and phase, select and add using rectangular plot:


  • To tune the plot by changing R and C values, use Tune functionality shown next to simulate option (shown below):

Component selected - R

Component selected - C


  • Adjusting R and C values. You can observe the plot as it changes the magnitude, dB, and phase with respect to the frequency:




  • RLC Simulation - Filter:
    • At the resonance frequency, the capacitor and the inductor resonate, and the L-C combination of the circuit gets short-circuited thus the in is equal to out. 
    • In the circuit, Vac = polar (1, 0) V, where 1 = amplitude and 0= phase.
    • Q = W * L / R, or Q = 1 / (W * R * C)


The above circuit simulation is a Band-Pass Filter constructed here. This circuit tuned with values shown above will peak the frequency at around 9 GHz and attenuate other nearby frequencies. 




  • Transistor Simulation - Amplifier:
    • Objective: Obtain the frequency response for a given transistor, see the gain and bandwidth of the transistor. Also, this is an attempt to create a simple amplifier.
    • This simulation (new schematic) is called AC_MOS as named. Before simulating AC transistor circuit, the transistor needs to be biased and simulate both AC and DC simulations. We will select 'NMOSRF'.
    • Choosing the size: Length as 0.5u (500n), and Width as 10u, as shown in the below figure mentioned in the pop-up parameters window as well as the transistor schematic.
Adding AC and DC simulation components.


Change simulation setting from standard to standard IC.




Defining transistor size

    • For biasing we will use a new component. But first, let's put the gpdk netlist as it is our necessity and requirement. Since, we are doing two simulation, the DC simulation is separated. Looking inside Lumped-Components, look for 'DC Feed' component shown in the below figure on left panel. This component works like a very high value inductor (For Example: 1 uH), which means this component behaves like a short circuit on a DC circuit, and open in AC - meaning the value of impedance is very high, and in the DC, the frequency = 0, which means it will allow the DC voltage to pass through it.
      • High Value Inductor:
        • AC: Open
        • DC: Short



    • Biasing: Since it allows the DC voltage, we use this for biasing and connect it with a DC source / bias voltage.



    • Now, we will ground the V_DC and make its value equal to 0.8 V. After that, add a DC_Block, which is a very high value coupling capacitor which does not allow any DC voltage or current but it isolates the gate of the transistor from any DC voltage coming in from the Source side. This DC block acts like a short circuit when there is a frequency (AC Domain) vs in DC circuit it acts like open. Hence, we will add a frequency domain V_AC here and set the amplitude = 1, and phase = 0: Vac = polar(1,0) V. After adding Vac, make it ground. 
    • After designing the above described circuit, move to the transistor side, and ground the Bulk and the Source of transistor. At the Drain, use a simple load-like resistor (R1) and make it 2K Ohm.
    • Use another DC voltage source for Drain biasing and change the voltage value Vdc to 1.8 V, and ground it as well.


    • Add the nodes Vin and Vout as shown in the blow image:



    • Circuit Simulation: Menu bar > Simulate > DC Annotation > Annotate Volatge. This shows that the transistor is in the saturation region (since, Vds > Vgs - Vth). On Annotating current, it shows the current value at drain is around 316 uA.

    • Rectangular Plot (AC Simulation): To show simulation, add AC_Vout for dB, and click OK. The plot shows the gain as 11 dB at peak.To find 3 dB cut-off point (m1), using 'Insert a New Marker' (shown below) having DC value of 7.6 dB / 2.7 GHz. Add unity marker (m2) in dB domain, hence move m2 to zero (0) which gives out unity gain bandwidth = 13.2 GHz. Also, add phase rectangular plot (AC_Vout) and select phase, starting at 180 because output is negative (Vout = -gm * ro * Vin), and it further decreases. The left plot shows the gain since, the input is 1 (Vac), and in dB terms it means the input is 0 (Gain = Vout / Vin = Vout / 1 = Vout). Hence, third plot in dB domain shows input, AC_Vin, showing AC.Vin as 0 (zero).




    • Here, AC.Vout is showing the gain. If written as dB(AC.Vout)-dB(AC.Vin), since dB (AC.Vin) = 0.


    • If AC.Vin magnitude is changed to value = 2, the gain is constant but the AC value is different her because this is not the AC value but magnitude (not dB), value(2), and if the dB is observed, it is equal to ~6.


    • Conclusion: Here, we obtained both DC operating points and AC frequency response for the transistor, and the simulation shows phase (plot 1), gain response (plot 2), and it is useful to obtain various types of information.



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